VHDL Source Code Obfuscator
The VHDL Obfuscator tool scrambles VHDL source code to make it very difficult to understand or reverse-engineer (example). This provides significant protection for source code intellectual property that must be shipped to a customer. It is a member of SD's family of Source Code Obfuscators.
VHDL Obfuscator Features
- Replaces names by nonsense names without affecting functionality
- User definable list of preserved names
- Predefined list of commonly-used VHDL system identifiers provided
- Strips comments and removes most source code structure
- User definable comment filtering, to preserve Copyright and Synthesis directives
- No changes to the your VHDL compilation or execution procedures or environment
- Option to neatly format VHDL source code as an aid to developer before obfuscation
- Output encoding in ASCII, European ASCII, or UNICODE
- Command line and GUI interfaces
Download an evaluation version
Semantic Designs also offers a Verilog obfuscator, a SystemVerilog obfuscator, and a SystemC obfuscator.
